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D. Radakovits, N. TaheriNejad, M. Cai, T. Delaroche, S. Mirabbasi:
"A Memristive Multiplier using Semi-Serial IMPLY-based Adder";
IEEE Transactions on Circuits and Systems, 67 (2020), 5; S. 1495 - 1506.

Memristors are among emerging technologies with many promising features, which makes them suitable not only for storage purposes but also for computations. In this work, focusing on in-memory computations, we first present our semi-serial IMPLY-based adder and perform an extensive analysis of its merits. In addition to providing a favorable balance between the number of steps and number of memristors, a key property of the presented adder is its compactness as compared to the state-ofthe-art adders. Next, using our semi-serial adder, we propose an IMPLY-based multiplier. We show that the proposed multiplier is more than 5× better than other works based on the figure of merit which gives equal weight to the number of steps (i.e., speed) and required die area. Additionally, we provide a deeper insight into IMPLY-based arithmetic units, their properties, design characteristics, and advantages or disadvantages compared to one another by proposing new figures of merit and performing comprehensive comparative analyses. This facilitates the process of design, or selection, of suitable units for the design engineers and researchers in the field.

http://dx.doi.org/10.1109/TCSI.2020.2965935.

https://publik.tuwien.ac.at/files/publik_293739.pdf