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Zeitschriftenartikel:

B. Goll, M. Hofbauer, B. Steindl, H. Zimmermann:
"A Fully Integrated SPAD-Based CMOS Data-Receiver With a Sensitivity of -64 dBm at 20 Mb/s";
IEEE Solid-State Circuits Letters, Vol. 1 (2018), No. 1; S. 2 - 5.



Kurzfassung englisch:
fully integrated 0.35-μm CMOS optical data receiver with a 50-μm diameter single-photon avalanche-diode and a cascoded gating circuit enabling a maximum excess bias voltage of 6.6 V (to obtain a high
photon detection efficiency) is presented. To optimize the sensitivity in presence of dark counts and after-pulsing a decision threshold of 2-5 photon counts can be selected. For red light (635 nm) and nonreturn-to-zero modulation the sensitivity is −64 dBm for 20 Mb/s with 100 MHz clock frequency and −57 dBm for 50 Mb/s with 250 MHz.

Schlagworte:
CMOS, optical data transmission, optical receivers, optoelectronic integrated circuit, single photon avalanche diode (SPAD)


"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/LSSC.2018.2794766


Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.