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Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):

A. Kanduri, M. Haghbayan, A. Rahmani, P. Liljeberg, A. Jantsch, H. Tenhunen:
"Dark Silicon Aware Runtime Mapping for Many-core Systems: A Patterning Approach";
Vortrag: International Conference on Computer Design (ICCD), New York, USA; 02.10.2015 - 06.10.2015; in: "roceedings of the International Conference on Computer Design (ICCD)", (2015), 8 S.



Kurzfassung englisch:
bstract
-Limitation on power budget in many-core systems
leaves a fraction of on-chip resources inactive, referred to as dark
silicon. In such systems, an efficient run-time application mapping
approach can considerably enhance resource utilization and
mitigate the dark silicon phenomenon. In this paper, we propose
a dark silicon aware runtime application mapping approach that
patterns active cores alongside the inactive cores in order to
evenly distribute power density across the chip. This approach
leverages dark silicon to balance the temperature of active cores
to provide higher power budget and better resource utilization,
within a safe peak operating temperature. In contrast with
exhaustive search based mapping approach, our agile heuristic
approach has a negligible runtime overhead. Our patterning
strategy yields a surplus power budget of up to 17% along with
an improved throughput of up to 21% in comparison with other
state-of-the-art run-time mapping strategies, while the surplus
budget is as high as 40% compared to worst case scenarios.

Schlagworte:
Dark Silicon; Power Budgeting; Runtime Mappin


"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/ICCD.2015.7357167


Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.